Job Description

Company Description
At CERN, the European Organization for Nuclear Research, physicists and engineers are probing the fundamental structure of the universe. Using the world's largest and most complex scientific instruments, they study the basic constituents of matter - fundamental particles that are made to collide together at close to the speed of light. The process gives physicists clues about how particles interact, and provides insights into the fundamental laws of nature. Find out more on http://home.cern.

Introduction
Are you a passionate and creative gateware engineer with experience in gateware DevOps? Join our team and work alongside experts in programmable technologies like FPGAs and system-on-chip (SoC) platforms. You will contribute to the design and support of both current and next-generation power converter controls, playing a direct role in our mission to deliver beam to our users.
You will join the which is responsible for the beam-related technical systems of the CERN accelerators. The SY teams design, build and operate equipment systems in all CERN accelerators, and are engaged in ambitious forward-looking R&D programmes.
The in the Accelerator Systems Department (SY) is responsible for the electrical power systems for the entire CERN accelerator complex. The is responsible for all of CERN's electronic power converter controls platforms; with existing systems using FPGA and future systems under development based on SoC. Our section is looking for a lead FPGA / SoC engineer, to take over the design and realisation of gateware solutions for these platforms, leading a team of graduates.
Functions
As FPGA / SoC Gateware Engineer, you will work in collaboration with users to create gateware solutions and manage the existing platforms, used in power converter controls. This covers the spectrum from gathering user requirements to providing user solutions, accompanied by test suites for long-term support.
Specifically, your functions will be:

• Designing and simulating modular programmable electronic device IP cores in a common framework;
• Newer systems are based on and System on Chip - Zynq UltraScale+ ;
• Existing systems are based on SRAM and FLASH FPGAs;
• Establishing and maintaining code versioning systems (Git);
• Implementing Continuous Integration & Deployment systems (CI/CD);
• Testing and validating and ensure coherency of code releases;
• Supervising a team of graduates;
• Defining requirements and providing user / expert documentation;
• Testing, commissioning, and supporting the operation of controls electronics.

Qualifications
Master's degree or PhD or equivalent relevant experience in the field of electronic engineering or computer engineering or embedded systems or a related field.
with a focus on FPGA design, SoC architecture, digital hardware design, or embedded systems development.
Experience:

• Proven experience in SoC / FPGA Technology with skills using Xilinx/AMD SoC and FPGA. This includes the definition of gateware architectures to successfully exploit this technology;
• Demonstrated experience in Gateware Dev-Ops;
• Initial experience in supervising a small team.

Technical competencies:

• Design and simulation of FPGA-based electronics;
• Knowledge and application of high-level description languages and tools;
• Knowledge and application of software life-cycle tools and procedures.

Behavioural competencies:

• Building relationships: investing appropriate trust in others; understanding how individual differences bring added value to the Organization; promoting complementarities.
• Solving problems: being open to original ideas and creative options by which to address issues; continually driving change by seeking new ways to improve outcomes.
• Achieving results: having a structured and organised approach towards work; being able to set priorities and plan tasks with results in mind.
• Demonstrating flexibility: being willing to work on different projects simultaneously.

Language skills:
Spoken and written English or French, with a commitment to learn the other language.
Additional Information
Eligibility and closing date:
has been an integral part of CERN's mission since its foundation and is an established value of the Organization. Employing a diverse workforce is central to our success. We welcome applications from all .
This vacancy will be filled as soon as possible, and applications should normally reach us no later than August 17, 2025 at 23:59 CET.
Employment Conditions
Contract type: Limited duration contract (5 years). Subject to certain conditions, holders of limited-duration contracts may apply for an indefinite position.
Working Hours: 40 hours per week
This position involves:

• Participation in a regular stand-by duty, including nights, Sundays and official holidays.

Job grade: 6-7
Job reference: SY-EPC-CCE-2025-107-LD
Benchmark Job Title: Electronics Engineer