Job Description

Position Summary

We are a global leader in the research, design, integration, manufacture, certification, and lifetime service of flight control, hydraulic, fuel, fluid conveyance, thermal management, lubrication, and pneumatic systems and components for aerospace, energy and other high-technology markets. The Parker Meggitt facility in Fribourg, Switzerland, designs and manufactures complete condition monitoring, vibration monitoring, and measurement solutions for the aerospace and energy industries.


Joining our team means you are helping to deliver our purpose of 'Enabling Engineering Breakthroughs that Lead to a Better Tomorrow'. A career at Parker MEGGITT offers boundless potential for professional and personal growth. You will work alongside the brightest minds in the world, help develop innovative technology and products and contribute to our company's goal of solving the world's greatest engineering challenges.


For our Motion, Power, Sensing Division site based in Fribourg, we are currently looking for an

Intern Engineering (6 months)

The Position

This internship focuses on leveraging FPGAs for high-speed, real-time image processing, utilizing the productivity benefits of High-Level Synthesis (HLS).


Project Objectives:

Algorithm Development:

Design and optimize a specific image processing using C++. The algorithms will be based on existing models (VHDL, Matlab or python).

HLS Implementation & Optimization:

Use a proprietary HLS tool (like Xilinx Vitis HLS) to transform the C++ algorithm into efficient Register-Transfer Level (RTL) hardware code. Apply HLS pragmas (directives) for optimization to meet real-time performance constraints.

Real-Time System Integration:

Implement the generated IP core onto an FPGA board equipped with an image sensor interface and an external memory (DDR). The core must process the video stream pixel-by-pixel, line-by-line to achieve real-time performance.

Validation and Performance Evaluation:

Validate the functionality by displaying the processed image output. Measure key performance metrics like throughput (frames per second) and latency (processing delay).

Your Profile

Bachelor or Master in Electrical or Software Engineering Basic knowledge of FPGA, digital hardware and VHDL is required Knowledge of embedded systems and relevant lab experience is a plus Rigorous and organized Hands-on attitude and team spirit Curiosity and willingness to learn French with good English level

If you are looking for a challenging internship with the opportunity to grow in a truly international company, please send your application (resume, letter of motivation, reference letters and diploma) through our website www.parker.com. Please note that only complete applications will be taken into consideration.